Issued Patents 2023
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11856797 | Resistive switching random access memory with asymmetric source and drain | Chin-Chieh Yang, Hsia-Wei Chen, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2023-12-26 |
| 11844286 | Flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao +3 more | 2023-12-12 |
| 11837312 | Magnetic memory device | Chia-Hsiang Chen, Chia Yu Wang, Meng-Chun Shih | 2023-12-05 |
| 11751405 | Integrated circuit and method for fabricating the same | Chieh-Fei Chiu, Wen-Ting Chu, Yong-Shiuan Tsair, Yu-Wen Liao, Chin-Chieh Yang | 2023-09-05 |
| 11751485 | Flat bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao +3 more | 2023-09-05 |
| 11737290 | RRAM memory cell with multiple filaments | Chin-Chieh Yang, Wen-Ting Chu, Yu-Wen Liao | 2023-08-22 |
| 11726747 | Magnetoresistive random-access memory (MRAM) random number generator (RNG) and a related method for generating a random bit | Harry-Hak-Lay Chuang, Ching-Huang Wang, Chih-Hui Weng, Tien-Wei Chiang, Meng-Chun Shih +2 more | 2023-08-15 |
| 11719742 | Semiconductor wafer testing system and related method for improving external magnetic field wafer testing | Harry-Hak-Lay Chuang, Ching-Huang Wang, Tien-Wei Chiang, Meng-Chun Shih, Chia Yu Wang | 2023-08-08 |
| 11723292 | RRAM cell structure with laterally offset BEVA/TEVA | Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2023-08-08 |
| 11678494 | Memory layout for reduced line loading | Wen-Ting Chu | 2023-06-13 |