Issued Patents 2022
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11538805 | Method of tuning threshold voltages of transistors | Kuan-Chang Chiu, Chia-Ching Lee, Hung-Chin Chung, Hsien-Ming Lee, Chi On Chui +2 more | 2022-12-27 |
| 11532509 | Selective hybrid capping layer for metal gates of transistors | Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Pin-Hsuan Yeh, Wei-Chin Lee +2 more | 2022-12-20 |
| 11497131 | Electrical connectors with link members | Cary Hung | 2022-11-08 |
| 11495006 | Object detection method for static scene and associated electronic device | Chao-Hsun Yang, Shang-Lun Chan, Shih-Tse Chen | 2022-11-08 |
| D965828 | Luminous wire | — | 2022-10-04 |
| 11444173 | Semiconductor device structure with salicide layer and method for forming the same | Hsiang-Ku Shen, Jin-Mu Yin, Tsung-Chieh Hsiao, Chia-Lin Chuang, Li-Zhen Yu +14 more | 2022-09-13 |
| 11437280 | Semiconductor device and method of manufacture | Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Chung-Chiang Wu +7 more | 2022-09-06 |
| 11387344 | Method of manufacturing a semiconductor device having a doped work-function layer | Chia-Ching Lee, Hung-Chin Chung, Chung-Chiang Wu, Hsuan-Yu Tung, Kuan-Chang Chiu +1 more | 2022-07-12 |
| 11302818 | Gate resistance reduction through low-resistivity conductive layer | Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee | 2022-04-12 |
| 11289343 | Method of gap filling using conformal deposition-annealing-etching cycle for reducing seam void and bending | De-Wei Yu, Chia-Ao Chang, Pin-Ju Liang | 2022-03-29 |
| 11289482 | Field effect transistor contact with reduced contact resistance | Su-Hao Liu, Yan-Ming Tsai, Chung-Ting Wei, Ziwei Fang, Chih-Wei Chang +1 more | 2022-03-29 |