CW

Chung-Chiang Wu

TSMC: 12 patents #163 of 3,577Top 5%
Overall (2022): #6,007 of 548,613Top 2%
12
Patents 2022

Issued Patents 2022

Showing 1–12 of 12 patents

Patent #TitleCo-InventorsDate
11538805 Method of tuning threshold voltages of transistors Kuan-Chang Chiu, Chia-Ching Lee, Chien-Hao Chen, Hung-Chin Chung, Hsien-Ming Lee +2 more 2022-12-27
11532509 Selective hybrid capping layer for metal gates of transistors Po-Cheng Chen, Kuo-Chan Huang, Pin-Hsuan Yeh, Wei-Chin Lee, Hsien-Ming Lee +2 more 2022-12-20
11437280 Semiconductor device and method of manufacture Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Hung-Chin Chung +7 more 2022-09-06
11430652 Controlling threshold voltages through blocking layers Chia-Ching Lee, Shih-Hang Chiu, Hsuan-Yu Tung, Da-Yuan Lee 2022-08-30
11430698 In-situ formation of metal gate modulators Hsin-Han Tsai, Cheng-Lung Hung, Weng Chang, Chi On Chui 2022-08-30
11404312 Contact plug with impurity variation Hsueh Wen Tsau, Chia-Ching Lee, Cheng-Lung Hung, Ching-Hwanq Su 2022-08-02
11387344 Method of manufacturing a semiconductor device having a doped work-function layer Chia-Ching Lee, Hung-Chin Chung, Hsuan-Yu Tung, Kuan-Chang Chiu, Chien-Hao Chen +1 more 2022-07-12
11380549 Semiconductor device with a work function layer having a concentration of fluorine Jung-Shiung Tsai, Wei-Fan Liao, Han-Ti Hsiaw 2022-07-05
11322411 Pre-deposition treatment for FET technology and devices formed thereby Cheng-Yen Tsai, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee +3 more 2022-05-03
11302818 Gate resistance reduction through low-resistivity conductive layer Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen 2022-04-12
11302582 Pre-deposition treatment for FET technology and devices formed thereby Cheng-Yen Tsai, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee +3 more 2022-04-12
11289480 Semiconductor device and method Shih-Hang Chiu, Chih-Chang Hung, I-Wei Yang, Shu-Yuan Ku, Cheng-Lung Hung +2 more 2022-03-29