| 11086630 |
Finish exception handling of an instruction completion table |
Kenneth L. Ward, Susan E. Eisen, Glenn O. Kincaid, Dhivya Jeganathan |
2021-08-10 |
| 11068267 |
High bandwidth logical register flush recovery |
Steven J. Battle, Brandon Goddard, Dung Q. Nguyen, Joshua W. Bowman, Brian D. Barrick +2 more |
2021-07-20 |
| 11068274 |
Prioritized instructions in an instruction completion table of a simultaneous multithreading processor |
Kenneth L. Ward, Susan E. Eisen, Dung Q. Nguyen, Albert J. Van Norstrand, Jr., Glenn O. Kincaid |
2021-07-20 |
| 10977034 |
Instruction completion table with ready-to-complete vector |
Kenneth L. Ward, Susan E. Eisen, Glenn O. Kincaid, Dung Q. Nguyen, Deepak Singh +1 more |
2021-04-13 |
| 10949213 |
Logical register recovery within a processor |
Steven J. Battle, Salma Ayub, Brian D. Barrick, Joshua W. Bowman, Susan E. Eisen +2 more |
2021-03-16 |
| 10936321 |
Instruction chaining |
Kurt A. Feiste, Joshua W. Bowman, Dung Q. Nguyen, Deepak Singh, Brian W. Thompto |
2021-03-02 |
