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Molded die last chip combination |
Rahul Agarwal |
2021-12-28 |
| 11189540 |
Arrangement and thermal management of 3D stacked dies |
John Wuu, Samuel D. Naffziger, Patrick J. Shyvers, Kaushik Mysore, Brett P. Wilkerson |
2021-11-30 |
| 11164807 |
Arrangement and thermal management of 3D stacked dies |
John Wuu, Samuel D. Naffziger, Patrick J. Shyvers, Kaushik Mysore, Brett P. Wilkerson |
2021-11-02 |
| 11018125 |
Multi-chip package with offset 3D structure |
Rahul Agarwal, Gabriel H. Loh |
2021-05-25 |
| 11011466 |
Integrated circuit package with integrated voltage regulator |
Rahul Agarwal, Chia-Hao Cheng |
2021-05-18 |
| 11011495 |
Multiple-die integrated circuit with integrated voltage regulator |
David Hugh McIntyre, Rahul Agarwal |
2021-05-18 |
| 11002572 |
Optical encoder with direction-dependent optical properties comprising a spindle having an array of surface features defining a concave contour along a first direction and a convex contour along a second direction |
Paisith P. Boonsom, Serhan O. Isikman, Richard Ruh, Prashanth S. Holenarsipur, Colin M. Ely +5 more |
2021-05-11 |
| 10943880 |
Semiconductor chip with reduced pitch conductive pillars |
Priyal Shah, Lei Fu |
2021-03-09 |
| 10937755 |
Bond pads for low temperature hybrid bonding |
Priyal Shah |
2021-03-02 |
| 10930621 |
Die stacking for multi-tier 3D integration |
Rahul Agarwal |
2021-02-23 |
| 10923430 |
High density cross link die with polymer routing layer |
Chun-Hung Lin, Rahul Agarwal, Fei Guo |
2021-02-16 |
| 10903168 |
Multi-RDL structure packages and methods of fabricating the same |
Lei Fu, Farshad Ghahghahi |
2021-01-26 |