Issued Patents 2020
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10854548 | Inter-die passive interconnects approaching monolithic performance | Debendra Das Sharma, Adel A. Elsherbini, Gerald Pasdast | 2020-12-01 |
| 10846258 | Voltage modulated control lane | Venkatraman Iyer, Mahesh Wagh | 2020-11-24 |
| 10789201 | High performance interconnect | Debendra Das Sharma, Mohiuddin M. Mazumder, Jong-Ru Guo, Anupriya Sriramulu, Narasimha Lanka +2 more | 2020-09-29 |
| 10678736 | Extending multichip package link off package | Debendra Das Sharma, Mahesh Wagh, Mohiuddin M. Mazumder, Venkatraman Iyer, Jeff C. Morriss | 2020-06-09 |
| 10560081 | Method, apparatus, system for centering in a high performance interconnect | Mahesh Wagh, Venkatraman Iyer, Gerald Pasdast, Todd Hinck, David M. Lee +1 more | 2020-02-11 |
| 10552253 | Multichip package link error detection | Venkatraman Iyer, Robert G. Blankenship, Mahesh Wagh | 2020-02-04 |
| 10552357 | Multichip package link | Mahesh Wagh, Debendra Das Sharma, Gerald Pasdast, Ananthan Ayyasamy, Xiaobei Li +2 more | 2020-02-04 |