| 10868765 |
Shaping traffic on PLCA-enabled 10SPE networks |
Bernd Sostawa, Martin Miller, Michael Rentschler |
2020-12-15 |
| 10846258 |
Voltage modulated control lane |
Zuoguo Wu, Mahesh Wagh |
2020-11-24 |
| 10795841 |
High performance interconnect physical layer |
Darren S. Jue, Sitaraman V. Iyer |
2020-10-06 |
| 10747688 |
Low latency retimer |
Michelle C. Jen, Debendra Das Sharma, Tao Liang |
2020-08-18 |
| 10712809 |
Link power savings with state retention |
Naveen Cherukuri, Jeffrey R. Wilcox, Selim Bilgin, David S. Dunning, Robin Tim Frodsham +2 more |
2020-07-14 |
| 10678736 |
Extending multichip package link off package |
Debendra Das Sharma, Zuoguo Wu, Mahesh Wagh, Mohiuddin M. Mazumder, Jeff C. Morriss |
2020-06-09 |
| 10606774 |
High performance interconnect physical layer |
Darren S. Jue, Jeff Willey, Robert G. Blankenship |
2020-03-31 |
| 10599602 |
Bimodal phy for low latency in high speed interconnects |
William R. Halleck, Rahul R. Shah, Eric M. Lee |
2020-03-24 |
| 10560081 |
Method, apparatus, system for centering in a high performance interconnect |
Mahesh Wagh, Zuoguo Wu, Gerald Pasdast, Todd Hinck, David M. Lee +1 more |
2020-02-11 |
| 10552253 |
Multichip package link error detection |
Robert G. Blankenship, Mahesh Wagh, Zuoguo Wu |
2020-02-04 |