Issued Patents 2020
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10592698 | Analog-based multiple-bit chip security | Kangguo Cheng, Xin Miao, Chen Zhang | 2020-03-17 |
| 10593753 | Vertical field effect transistor (VFET) device with controllable top spacer | Chen Zhang, Kangguo Cheng, Xin Miao | 2020-03-17 |
| 10586856 | Nanosheet FET device with epitaxial nucleation | Nicolas Loubet, Julien Frougier, Zhenxing Bi | 2020-03-10 |
| 10580709 | Flipped vertical field-effect-transistor | Kangguo Cheng, Xin Miao, Chen Zhang | 2020-03-03 |
| 10566445 | Gate spacer and inner spacer formation for nanosheet transistors having relatively small space between gates | Zhenxing Bi, Kangguo Cheng, Nicolas Loubet, Xin Miao, Chen Zhang | 2020-02-18 |
| 10566444 | Vertical fin field effect transistor with a reduced gate-to-bottom source/drain parasitic capacitance | Chen Zhang, Kangguo Cheng, Xin Miao | 2020-02-18 |
| 10559504 | High mobility semiconductor fins on insulator | Kangguo Cheng, Xin Miao, Chen Zhang | 2020-02-11 |
| 10559502 | Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain | Kangguo Cheng, Xin Miao, Chen Zhang | 2020-02-11 |
| 10553493 | Fabrication of a vertical transistor with self-aligned bottom source/drain | Kangguo Cheng, Xin Miao, Chen Zhang | 2020-02-04 |
| 10535652 | Fabrication of vertical fin field effect transistors having top air spacers and a self-aligned top junction | Kangguo Cheng, Xin Miao, Chen Zhang | 2020-01-14 |
| 10529823 | Method of manufacturing a semiconductor device having a metal gate with different lateral widths between spacers | Xin Miao, Kangguo Cheng, Chen Zhang | 2020-01-07 |
| 10529713 | Fin field effect transistor devices with modified spacer and gate dielectric thicknesses | Xin Miao, Kangguo Cheng, Chen Zhang | 2020-01-07 |