Issued Patents 2020
Showing 26–50 of 81 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10720528 | Method and structure of stacked FinFET | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2020-07-21 |
| 10720502 | Vertical transistors having a layer of charge carriers in the extension region for reduced extension region resistance | Takashi Ando, Choonghyun Lee, Alexander Reznicek, Jingyun Zhang | 2020-07-21 |
| 10714570 | Fabrication of perfectly symmetric gate-all-around FET on suspended nanowire using interface interaction | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2020-07-14 |
| 10714593 | Fabrication of strained vertical p-type field effect transistors by bottom condensation | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2020-07-14 |
| 10707336 | High-performance lateral BJT with epitaxial lightly doped intrinsic base | Tak H. Ning, Jeng-Bang Yau | 2020-07-07 |
| 10707304 | Vertically stacked nFET and pFET with dual work function | Alexander Reznicek, Takashi Ando, Jingyun Zhang, Choonghyun Lee | 2020-07-07 |
| 10699967 | Co-integration of high carrier mobility PFET and NFET devices on the same substrate using low temperature condensation | Takashi Ando, Choonghyun Lee | 2020-06-30 |
| 10700058 | Compound semiconductor devices having buried resistors formed in buffer layer | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2020-06-30 |
| 10692866 | Co-integrated channel and gate formation scheme for nanosheet transistors having separately tuned threshold voltages | Takashi Ando, Jingyun Zhang, Choonghyun Lee, Alexander Reznicek | 2020-06-23 |
| 10692873 | Gate formation scheme for nanosheet transistors having different work function metals and different nanosheet width dimensions | Takashi Ando, Ruqiang Bao, Choonghyun Lee | 2020-06-23 |
| 10692859 | Large area diode co-integrated with vertical field-effect-transistors | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2020-06-23 |
| 10686076 | Germanium condensation for replacement metal gate devices with silicon germanium channel | Takashi Ando, Choonghyun Lee | 2020-06-16 |
| 10672865 | Deformable and flexible capacitor | Karthik Balakrishnan, Stephen W. Bedell, Alexander Reznicek | 2020-06-02 |
| 10672891 | Stacked gate all around MOSFET with symmetric inner spacer formed via sacrificial pure Si anchors | Takashi Ando, Choonghyun Lee, Jingyun Zhang | 2020-06-02 |
| 10672862 | High density vertically integrated FEOL MIM capacitor | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2020-06-02 |
| 10658582 | Vertical resistive processing unit with air gap | Takashi Ando, Choonghyun Lee | 2020-05-19 |
| 10658030 | Synaptic crossbar memory array | Ali Afzali-Ardakani, Talia S. Gershon, Bahman Hekmatshoartabari | 2020-05-19 |
| 10658429 | High-density field-enhanced ReRAM integrated with vertical transistors | Takashi Ando, Alexander Reznicek | 2020-05-19 |
| 10658462 | Vertically stacked dual channel nanosheet devices | Choonghyun Lee, Jingyun Zhang, Takashi Ando, Alexander Reznicek | 2020-05-19 |
| 10658507 | Vertical transistor pass gate device | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2020-05-19 |
| 10658513 | Formation of FinFET junction | Kevin K. Chan, Ali Khakifirooz, John A. Ott, Alexander Reznicek | 2020-05-19 |
| 10651295 | Forming a fin using double trench epitaxy | Veeraraghavan S. Basker, Shogo Mochizuki, Alexander Reznicek | 2020-05-12 |
| 10651123 | High density antifuse co-integrated with vertical FET | Alexander Reznicek, Miaomiao Wang, Takashi Ando | 2020-05-12 |
| 10644109 | Digital alloy vertical lamellae FinFET with current flow in alloy layer direction | Karthik Balakrishnan, Stephen W. Bedell, Bahman Hekmatshoartabari, Alexander Reznicek | 2020-05-05 |
| 10644007 | Decoupling capacitor on strain relaxation buffer layer | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2020-05-05 |