Issued Patents 2019
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10459338 | Exposure activated chemically amplified directed self-assembly (DSA) for back end of line (BEOL) pattern cutting and plugging | Eungnak Han, Swaminathan Sivakumar, Ernisse Putna | 2019-10-29 |
| 10338474 | Underlying absorbing or conducting layer for Ebeam direct write (EBDW) lithography | Shakul Tandon, Yan Borodovsky, Charles H. Wallace | 2019-07-02 |
| 10325814 | Patterning of vertical nanowire transistor channel and gate with directed self assembly | Swaminathan Sivakumar | 2019-06-18 |
| 10319625 | Metal via processing schemes with via critical dimension (CD) control for back end of line (BEOL) interconnects and the resulting structures | Mohit K. HARAN, Charles H. Wallace, Robert M. Bigwood, Deepak S. Rao, Alexander F. Kaplan | 2019-06-11 |
| 10297467 | Self-aligned via and plug patterning for back end of line (BEOL) interconnects | Charles H. Wallace | 2019-05-21 |
| 10211088 | Self-aligned isotropic etch of pre-formed vias and plugs for back end of line (BEOL) interconnects | Charles H. Wallace, Elliot N. Tan, Swaminathan Sivakumar | 2019-02-19 |
| 10204830 | Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnects | Charles H. Wallace, Elliot N. Tan, Swaminathan Sivakumar | 2019-02-12 |