Issued Patents 2019
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10511224 | Bi-directional multi-mode charge pump | Jaydeep P. Kulkarni, Yong Shim, Pascal A. Meinerzhagen | 2019-12-17 |
| 10489702 | Hybrid compression scheme for efficient storage of synaptic weights in hardware neuromorphic cores | Somnath Paul, Charles Augustine | 2019-11-26 |
| 10483961 | Charge injector with integrated level shifter for localized mitigation of supply voltage droop | Suyoung Bang, Minki Cho, Pascal A. Meinerzhagen | 2019-11-19 |
| 10454476 | Calibrated biasing of sleep transistor in integrated circuits | Suyoung Bang, Charles Augustine, Pascal A. Meinerzhagen, Minki Cho | 2019-10-22 |
| 10423203 | Flip-flop circuit with low-leakage transistors | Charles Augustine, Rafael Rios, Somnath Paul | 2019-09-24 |
| 10418076 | Apparatus for data retention and supply noise mitigation using clamps | Pascal A. Meinerzhagen, Stephen Kim, Anupama A. Thaploo | 2019-09-17 |
| 10410699 | Multi-bit pulsed latch including serial scan chain | Anupama A. Thaploo, Bhushan M. Borole, Pascal A. Meinerzhagen | 2019-09-10 |
| 10403266 | Detecting keywords in audio using a spiking neural network | Oren Arad, Binuraj Ravindran, Somnath Paul, Charles Augustine, Bruno Umbria Pedroni | 2019-09-03 |
| 10374584 | Low power retention flip-flop with level-sensitive scan circuitry | Charles Augustine, Arvind Raman, Feroze Merchant, Ashish V. Choubal | 2019-08-06 |
| 10359834 | Graphics processor sub-domain voltage regulation | Subramaniam Maiyuran, James W. Tschanz | 2019-07-23 |
| 10333379 | Power switching circuitry including power-up control | Suphachai Chai Sutanthavibul, Iqbal Rajwani, Anupama A. Thaploo, Surya Sasi Kiran Tallapragada, Daivik H Bhatt +3 more | 2019-06-25 |
| 10269419 | Aging aware dynamic keeper apparatus and associated method | Jaydeep P. Kulkarni, Vivek K. De | 2019-04-23 |
| 10243563 | Voltage level shifter monitor with tunable voltage level shifter replica circuit | Andrea Bonetti, Jaydeep P. Kulkarni, Carlos Tokunaga, Minki Cho, Pascal A. Meinerzhagen | 2019-03-26 |
| 10217509 | Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks | Jaydeep P. Kulkarni, Bibiche M. Geuskens, James W. Tschanz, Vivek K. De | 2019-02-26 |
| 10199091 | Retention minimum voltage determination techniques | Minki Cho, Jaydeep P. Kulkarni, Carlos Tokunaga, James W. Tschanz | 2019-02-05 |
| 10199080 | Low swing bitline for sensing arrays | Jaydeep P. Kulkarni | 2019-02-05 |