Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Hybrid compression scheme for efficient storage of synaptic weights in hardware neuromorphic cores

Hybrid compression scheme for efficient storage of synaptic weights in hardware neuromorphic cores

US Patent 10489702 · Granted Nov 26, 2019

Estimated economic value: $25,149,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

SRAM with P-type access transistors and complementary field-effect transistor te2025
SRAM with P-type access transistors and complementary field-effect transistor te2025
Circuits and methods for supply voltage detection and timing monitoring2025
Hardware offload circuitry2025
Unified retention and wake-up clamp apparatus and method2024
Unified retention and wake-up clamp apparatus and method2024
Dual loop digital low drop regulator and current sharing control apparatus for d2024
Energy efficient memory array with optimized burst read and write data access2024
Energy efficient memory array with optimized burst read and write data access2024
Energy efficient memory array with optimized burst read and write data access2024
Distributed and scalable all-digital low dropout integrated voltage regulator2023
Distributed and scalable all-digital low dropout integrated voltage regulator2023