Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10509752 | Configuration of multi-die modules with through-silicon vias | Russell Schreiber, Michael Kevin Ciraula, Patrick J. Shyvers | 2019-12-17 |
| 10431517 | Arrangement and thermal management of 3D stacked dies | Samuel D. Naffziger, Patrick J. Shyvers, Milind S. Bhagavat, Kaushik Mysore, Brett P. Wilkerson | 2019-10-01 |
| 10366734 | Programmable write word line boost for low voltage memory operation | Alexander W. Schaefer, Ravi Jotwani, Samiul Haque Khan, David Hugh McIntyre, Stephen V. Kosonocky +1 more | 2019-07-30 |
| 10311191 | Memory including side-car arrays with irregular sized entries | Patrick J. Shyvers, Ryan Alan Selby | 2019-06-04 |
| 10303398 | Swizzling in 3D stacked memory | Michael Kevin Ciraula, Russell Schreiber, Samuel D. Naffziger | 2019-05-28 |