Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10509752 | Configuration of multi-die modules with through-silicon vias | John Wuu, Michael Kevin Ciraula, Patrick J. Shyvers | 2019-12-17 |
| 10366734 | Programmable write word line boost for low voltage memory operation | Alexander W. Schaefer, Ravi Jotwani, Samiul Haque Khan, David Hugh McIntyre, Stephen V. Kosonocky +1 more | 2019-07-30 |
| 10331196 | Reduced setup time clock gating circuit | — | 2019-06-25 |
| 10303398 | Swizzling in 3D stacked memory | John Wuu, Michael Kevin Ciraula, Samuel D. Naffziger | 2019-05-28 |