Issued Patents 2018
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163875 | Method for forming chip package structure with adhesive layer | Po-Hao Tsai, Jing-Cheng Lin, Yi-Hang Lin | 2018-12-25 |
| 10163848 | Semiconductor package | Jing-Cheng Lin, Po-Hao Tsai, Chih-Chien Pan | 2018-12-25 |
| 10134719 | Semiconductor package and manufacturing method thereof | Jing-Cheng Lin, Po-Hao Tsai | 2018-11-20 |
| 10115675 | Packaged semiconductor device and method of fabricating a packaged semiconductor device | Jing-Cheng Lin, Po-Hao Tsai | 2018-10-30 |
| 10103132 | Semiconductor device and method of manufactures | Jing-Cheng Lin, Po-Hao Tsai | 2018-10-16 |
| 10083946 | Integrated fan-out structure with guiding trenches in buffer layer | Po-Hao Tsai, Feng-Cheng Hsu, Jui-Pin Hung, Jing-Cheng Lin | 2018-09-25 |
| 10079225 | Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package | Jing-Cheng Lin, Jui-Pin Hung | 2018-09-18 |
| 10079159 | Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package | Jing-Cheng Lin, Jui-Pin Hung | 2018-09-18 |
| 10062662 | Integrated fan-out package structures with recesses in molding compound | Po-Hao Tsai, Jui-Pin Hung, Jing-Cheng Lin | 2018-08-28 |
| 10008485 | Semiconductor device and method of manufacture | Jing-Cheng Lin, Po-Hao Tsai, Porter Chen | 2018-06-26 |
| 9953955 | Integrated fan-out package structures with recesses in molding compound | Po-Hao Tsai, Jui-Pin Hung, Jing-Cheng Lin | 2018-04-24 |
| 9929128 | Chip package structure with adhesive layer | Po-Hao Tsai, Jing-Cheng Lin, Yi-Hang Lin | 2018-03-27 |