Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10082541 | Mixed redundancy scheme for inter-die interconnects in a multichip package | Dinesh Patil, Arifur Rahman, Jeffrey Erik Schulz | 2018-09-25 |
| 10044344 | Systems and methods for a low hold-time sequential input stage | Herman Schmit | 2018-08-07 |
| 9960903 | Systems and methods for clock alignment using pipeline stages | Carl Ebeling, Audrey Kertesz | 2018-05-01 |
| 9946826 | Circuit design implementations in secure partitions of an integrated circuit | Sean R. Atsatt, Ting Lu, Herman Schmit | 2018-04-17 |
| 9922157 | Sector-based clock routing methods and apparatus | Carl Ebeling, Herman Schmit, Mahesh A. Iyer, Saurabh Adya | 2018-03-20 |