Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10141936 | Pipelined interconnect circuitry with double data rate interconnections | David Lewis, Herman Schmit | 2018-11-27 |
| 10074409 | Configurable storage blocks having simple first-in first-out enabling circuitry | Simon Finn | 2018-09-11 |
| 9960903 | Systems and methods for clock alignment using pipeline stages | Dana How, Audrey Kertesz | 2018-05-01 |
| 9922157 | Sector-based clock routing methods and apparatus | Herman Schmit, Dana How, Mahesh A. Iyer, Saurabh Adya | 2018-03-20 |