Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10162918 | Integrated circuit retiming with selective modeling of flip-flop secondary signals | Vasudeva M. Kamath, Robert Walker | 2018-12-25 |
| 10162924 | Method and apparatus for performing large scale consensus based clustering | Love Singhal, Saurabh Adya | 2018-12-25 |
| 10157247 | Method and apparatus for performing rewind structural verification of retimed circuits driven by a plurality of clocks | Vasudeva M. Kamath | 2018-12-18 |
| 10101387 | Sharing a JTAG interface among multiple partitions | Yi Peng | 2018-10-16 |
| 9922157 | Sector-based clock routing methods and apparatus | Carl Ebeling, Herman Schmit, Dana How, Saurabh Adya | 2018-03-20 |