Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10162918 | Integrated circuit retiming with selective modeling of flip-flop secondary signals | Mahesh A. Iyer, Vasudeva M. Kamath | 2018-12-25 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10162918 | Integrated circuit retiming with selective modeling of flip-flop secondary signals | Mahesh A. Iyer, Vasudeva M. Kamath | 2018-12-25 |