Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9886193 | Architecture and implementation of cortical system, and fabricating an architecture using 3D wafer scale integration | Daniel G. Berger, Troy L. Graves-Abe, Subramanian S. Iyer, Arvind Kumar, Winfried W. Wilcke | 2018-02-06 |
| 9870979 | Double-sided segmented line architecture in 3D integration | Pooja R. Batra, John W. Golz, Mark D. Jacunski | 2018-01-16 |
| 9859177 | Test method and structure for integrated circuits before complete metalization | Janakiraman Viraraghavan, Ramesh Raghavan, Balaji Jayaraman, Thejas Kempanna, Rajesh Reddy Tummuru | 2018-01-02 |