Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9940302 | Interconnect circuits at three dimensional (3-D) bonding interfaces of a processor array | Rodrigo Alvarez-Icaza Rivera, John V. Arthur, John E. Barth, Jr., Andrew S. Cassidy, Bryan L. Jackson +3 more | 2018-04-10 |
| 9886193 | Architecture and implementation of cortical system, and fabricating an architecture using 3D wafer scale integration | Daniel G. Berger, Troy L. Graves-Abe, Toshiaki Kirihata, Arvind Kumar, Winfried W. Wilcke | 2018-02-06 |
| 9859262 | Thermally enhanced package to reduce thermal interaction between dies | Janak G. Patel, Daniel G. Berger | 2018-01-02 |