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Processing of multiple instruction streams in a parallel slice processor |
Lee Evan Eisen, Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti +1 more |
2018-12-18 |
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Linkable issue queue parallel execution slice for a processor |
Jeffrey C. Brownscheidle, Sundeep Chadha, Maureen A. Delaney, Hung Q. Le, Dung Q. Nguyen |
2018-11-20 |
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Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries |
Salma Ayub, Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le +1 more |
2018-11-20 |
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Fast multi-width instruction issue in parallel slice processor |
Salma Ayub, Jeffrey C. Brownscheidle, Sundeep Chadha, Dung Q. Nguyen, Tu-An T. Nguyen +1 more |
2018-11-06 |
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Scheme for determining data object usage in a memory region |
Giles R. Frazier, Michael K. Gschwind, Younes Manton, Karl M. Taylor |
2018-09-25 |
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Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices |
Lee Evan Eisen, Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti +1 more |
2018-09-25 |
| 10078514 |
Techniques for dynamic sequential instruction prefetching |
Richard J. Eickemeyer, Sheldon B. Levenstein, David S. Levitan, Mauricio J. Serrano |
2018-09-18 |
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Handling unaligned load operations in a multi-slice computer processor |
Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Jentje Leenstra +2 more |
2018-09-11 |
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Scheme for determining data object usage in a memory region |
Giles R. Frazier, Michael K. Gschwind, Younes Manton, Karl M. Taylor |
2018-09-11 |
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Handling unaligned load operations in a multi-slice computer processor |
Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Jentje Leenstra +2 more |
2018-09-04 |
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Managing a divided load reorder queue |
Richard J. Eickemeyer, David A. Hrusecky, Elizabeth A. McGlone, Albert J. Van Norstrand, Jr. |
2018-08-07 |
| 10037211 |
Operation of a multi-slice processor with an expanded merge fetching queue |
Kimberly M. Fernsler, David A. Hrusecky, Hung Q. Le, Elizabeth A. McGlone |
2018-07-31 |
| 9996359 |
Fast multi-width instruction issue in parallel slice processor |
Salma Ayub, Jeffrey C. Brownscheidle, Sundeep Chadha, Dung Q. Nguyen, Tu-An T. Nguyen +1 more |
2018-06-12 |
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Generating ECC values for byte-write capable registers |
Dhivya Jeganathan, Dung Q. Nguyen, Jose Angel Paredes, David R. Terry |
2018-05-29 |
| 9985655 |
Generating ECC values for byte-write capable registers |
Dhivya Jeganathan, Dung Q. Nguyen, Jose Angel Paredes, David R. Terry |
2018-05-29 |
| 9977678 |
Reconfigurable parallel execution and load-store slice processor |
Lee Evan Eisen, Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti +1 more |
2018-05-22 |
| 9971602 |
Reconfigurable processing method with modes controlling the partitioning of clusters and cache slices |
Lee Evan Eisen, Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti +1 more |
2018-05-15 |
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Deterministic current based frequency optimization of processor chip |
Malcolm S. Allen-Ware, Michael Stephen Floyd, Joshua D. Friedrich, Charles R. Lefurgy, Kirk D. Peterson +5 more |
2018-04-24 |
| 9940133 |
Operation of a multi-slice processor implementing simultaneous two-target loads and stores |
Robert A. Cordes, David A. Hrusecky, Jennifer L. Molnar, Jose Angel Paredes |
2018-04-10 |
| 9934033 |
Operation of a multi-slice processor implementing simultaneous two-target loads and stores |
Robert A. Cordes, David A. Hrusecky, Jennifer L. Molnar, Jose Angel Paredes |
2018-04-03 |
| 9916239 |
Multi-section garbage collection |
Giles R. Frazier, Michael K. Gschwind, Younes Manton, Karl M. Taylor |
2018-03-13 |
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Independent mapping of threads |
Sam Gat-Shang Chu, Markus Kaltenbach, Hung Q. Le, Jentje Leenstra, Jose E. Moreira +1 more |
2018-01-16 |