Issued Patents 2018
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10042647 | Managing a divided load reorder queue | Richard J. Eickemeyer, David A. Hrusecky, Brian W. Thompto, Albert J. Van Norstrand, Jr. | 2018-08-07 |
| 10042770 | Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions | Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le | 2018-08-07 |
| 10037211 | Operation of a multi-slice processor with an expanded merge fetching queue | Kimberly M. Fernsler, David A. Hrusecky, Hung Q. Le, Brian W. Thompto | 2018-07-31 |
| 10037229 | Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions | Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le | 2018-07-31 |
| 9983875 | Operation of a multi-slice processor preventing early dependent instruction wakeup | Sundeep Chadha, David A. Hrusecky, Jennifer L. Molnar | 2018-05-29 |
| 9916245 | Accessing partial cachelines in a data cache | Richard J. Eickemeyer, Kimberly M. Fernsler, Guy L. Guthrie, David A. Hrusecky | 2018-03-13 |