VO

Vage Oganesian

TE Tessera: 8 patents #3 of 26Top 15%
OP Optiz: 6 patents #1 of 2Top 50%
📍 Sunnyvale, CA: #20 of 2,660 inventorsTop 1%
🗺 California: #569 of 60,394 inventorsTop 1%
Overall (2017): #3,257 of 506,227Top 1%
14
Patents 2017

Issued Patents 2017

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
9853079 Method of forming a stress released image sensor package structure Zhenhua Lu 2017-12-26
9847277 Staged via formation from both sides of chip Belgacem Haba, Ilyas Mohammed, Craig Mitchell, Piyush Savalia 2017-12-19
9812360 Systems and methods for producing flat surfaces in interconnect structures Cyprian Emeka Uzoh, Ilyas Mohammed 2017-11-07
9666625 Method of making low profile sensor package with cooling feature Zhenhua Lu 2017-05-30
9667900 Three dimensional system-on-chip image sensor package Zhenhua Lu 2017-05-30
9666730 Wire bond sensor package Zhenhua Lu 2017-05-30
9659812 Microelectronic elements with post-assembly planarization Belgacem Haba, Craig Mitchell, Ilyas Mohammed, Piyush Savalia 2017-05-23
9640437 Methods of forming semiconductor elements using micro-abrasive particle stream Belgacem Haba, Craig Mitchell, Ilyas Mohammed, Piyush Savalia 2017-05-02
9620437 Stacked microelectronic assembly with TSVS formed in stages and carrier above chip Belgacem Haba, Ilyas Mohammed, Craig Mitchell, Piyush Savalia 2017-04-11
9570634 Sensor package with exposed sensor array and method of making same Zhenhua Lu 2017-02-14
9560773 Electrical barrier layers Cyprian Emeka Uzoh, Ilyas Mohammed, Belgacem Haba, Piyush Savalia, Craig Mitchell 2017-01-31
9558998 Systems and methods for producing flat surfaces in interconnect structures Cyprian Emeka Uzoh, Ilyas Mohammed 2017-01-31
9548254 Packaged semiconductor chips with array Andrey Grinman, David Ovrutsky, Charles Rosenstein 2017-01-17
9543347 Stress released image sensor package structure and method Zhenhua Lu 2017-01-10