PS

Piyush Savalia

TE Tessera: 5 patents #6 of 26Top 25%
📍 San Jose, CA: #438 of 5,952 inventorsTop 8%
🗺 California: #3,807 of 60,394 inventorsTop 7%
Overall (2017): #26,929 of 506,227Top 6%
5
Patents 2017

Issued Patents 2017

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
9847277 Staged via formation from both sides of chip Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Craig Mitchell 2017-12-19
9659812 Microelectronic elements with post-assembly planarization Vage Oganesian, Belgacem Haba, Craig Mitchell, Ilyas Mohammed 2017-05-23
9640437 Methods of forming semiconductor elements using micro-abrasive particle stream Vage Oganesian, Belgacem Haba, Craig Mitchell, Ilyas Mohammed 2017-05-02
9620437 Stacked microelectronic assembly with TSVS formed in stages and carrier above chip Vage Oganesian, Belgacem Haba, Ilyas Mohammed, Craig Mitchell 2017-04-11
9560773 Electrical barrier layers Cyprian Emeka Uzoh, Vage Oganesian, Ilyas Mohammed, Belgacem Haba, Craig Mitchell 2017-01-31