Issued Patents 2017
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9842804 | Methods for reducing dual damascene distortion | Chao-Chun Wang, Chung-Chi Ko | 2017-12-12 |
| 9768061 | Low-k dielectric interconnect systems | Chia-Cheng Chou, Chung-Chi Ko | 2017-09-19 |
| 9754822 | Interconnect structure and method | Chia-Cheng Chou, Chih-Chien Chi, Chung-Chi Ko, Yao-Jen Chang, Chen-Yuan Kao +3 more | 2017-09-05 |
| 9748134 | Method of making interconnect structure | Yu-Yun Peng, Chia-Cheng Chou, Joung-Wei Liou | 2017-08-29 |