Issued Patents 2017
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9842021 | Memory device check bit read mode | Kuljit S. Bains | 2017-12-12 |
| 9824743 | Memory refresh operation with page open | Bruce Querbach, Kuljit S. Bains | 2017-11-21 |
| 9817714 | Memory device on-die error checking and correcting code | Kuljit S. Bains, Kjersten E. Criss | 2017-11-14 |
| 9811420 | Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC) | Debaleena Das, Bill Nale, Kuljit S. Bains | 2017-11-07 |
| 9768148 | Stacked memory with interface providing offset interconnects | Pete D. Vogt, Andre Schaefer, Warren R. Morrow, Jin-Sung Kim, Kenneth D. Shoemaker | 2017-09-19 |
| 9761298 | Method, apparatus and system for responding to a row hammer event | Kuljit S. Bains | 2017-09-12 |
| 9747971 | Row hammer refresh command | Kuljit S. Bains, Christopher P. Mozak, Theodore Z. Schoenborn, Zvika Greenfield | 2017-08-29 |
| 9740558 | On-die ECC with error counter and internal address generation | Kuljit S. Bains | 2017-08-22 |
| 9728245 | Precharging and refreshing banks in memory device with bank group architecture | Kuljit S. Bains, Nadav Bonen, Tomer Levy | 2017-08-08 |
| 9721640 | Performance of additional refresh operations during self-refresh mode | Kuljit S. Bains, Shay Fux | 2017-08-01 |
| 9721643 | Row hammer monitoring based on stored row hammer threshold value | Kuljit S. Bains | 2017-08-01 |
| 9704563 | Apparatus, method and system for performing successive writes to a bank of a dynamic random access memory | Kuljit S. Bains | 2017-07-11 |
| 9704544 | Method, apparatus and system to manage implicit pre-charge command signaling | Bruce A. Christenson, Kuljit S. Bains | 2017-07-11 |
| 9659626 | Memory refresh operation with page open | Bruce Querbach, Kuljit S. Bains | 2017-05-23 |
| 9564201 | Method, apparatus and system for responding to a row hammer event | Kuljit S. Bains | 2017-02-07 |
| 9558066 | Exchanging ECC metadata between memory and host system | Nadav Bonen, Kuljit S. Bains | 2017-01-31 |
| 9536863 | Interconnection of a packaged chip to a die in a package utilizing on-package input/output interfaces | Todd Hinck, Zuoguo Wu, Aaron Martin, Andrew Martwick | 2017-01-03 |
| 9536588 | Reduction of power consumption in memory devices during refresh modes | Christopher E. Cox, Kuljit S. Bains | 2017-01-03 |