Issued Patents 2017
Showing 51–75 of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9666489 | Stacked nanowire semiconductor device | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-05-30 |
| 9659829 | Hybrid orientation vertically stacked III-V and Ge gate-all-around CMOS | Pouya Hashemi, Sanghoon Lee, Alexander Reznicek | 2017-05-23 |
| 9660032 | Method and apparatus providing improved thermal conductivity of strain relaxed buffer | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-05-23 |
| 9659823 | Highly scaled tunnel FET with tight pitch and method to fabricate same | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-05-23 |
| 9653362 | Complementary heterogeneous MOSFET using global SiGe substrate and hard-mask memorized germanium dilution for nFET | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-05-16 |
| 9653580 | Semiconductor device including strained finFET | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-05-16 |
| 9653465 | Vertical transistors having different gate lengths | Pouya Hashemi, Tak H. Ning, Alexander Reznicek | 2017-05-16 |
| 9653289 | Fabrication of nano-sheet transistors with different threshold voltages | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-05-16 |
| 9647123 | Self-aligned sigma extension regions for vertical transistors | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-05-09 |
| 9647112 | Fabrication of strained vertical P-type field effect transistors by bottom condensation | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-05-09 |
| 9640667 | III-V vertical field effect transistors with tunable bandgap source/drain regions | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-05-02 |
| 9633912 | Complementary heterogeneous MOSFET using global SiGe substrate and hard-mask memorized germanium dilution for nFET | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-04-25 |
| 9627330 | Support for long channel length nanowire transistors | Isaac Lauer, Tenko Yamashita, Jeffrey W. Sleight | 2017-04-18 |
| 9627536 | Field effect transistors with strained channel features | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-04-18 |
| 9627381 | Confined N-well for SiGe strain relaxed buffer structures | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-04-18 |
| 9627267 | Integrated circuit having strained fins on bulk substrate and method to fabricate same | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-04-18 |
| 9614037 | Nano-ribbon channel transistor with back-bias control | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-04-04 |
| 9614040 | Strained silicon germanium fin with block source/drain epitaxy and improved overlay capacitance | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-04-04 |
| 9613873 | Nanowire semiconductor device | Pouya Hashemi, Sanghoon Lee | 2017-04-04 |
| 9570300 | Strain relaxed buffer layers with virtually defect free regions | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-02-14 |
| 9570575 | Capacitor in strain relaxed buffer | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-02-14 |
| 9570551 | Replacement III-V or germanium nanowires by unilateral confined epitaxial growth | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-02-14 |
| 9570443 | Field effect transistor including strained germanium fins | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-02-14 |
| 9570356 | Multiple gate length vertical field-effect-transistors | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-02-14 |
| 9559013 | Stacked nanowire semiconductor device | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-01-31 |