Issued Patents 2017
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9559040 | Double-sided segmented line architecture in 3D integration | Pooja R. Batra, Mark D. Jacunski, Toshiaki Kirihata | 2017-01-31 |
| 9543229 | Combination of TSV and back side wiring in 3D integration | Pooja R. Batra, Subramanian S. Iyer, Douglas C. La Tulipe, Jr., Spyridon Skordas, Kevin R. Winstel | 2017-01-10 |
| 9536809 | Combination of TSV and back side wiring in 3D integration | Pooja R. Batra, Subramanian S. Iyer, Douglas C. La Tulipe, Jr., Spyridon Skordas, Kevin R. Winstel | 2017-01-03 |