Issued Patents 2017
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9786333 | Dual-bit 3-T high density MTPROM array | Ramesh Raghavan, Balaji Jayaraman, Janakiraman Viraraghavan, Thejas Kempanna, Rajesh Reddy Tummuru | 2017-10-10 |
| 9690927 | Providing an authenticating service of a chip | Srivatsan Chellappa, Subramanian S. Iyer, Sami Rosenblatt | 2017-06-27 |
| 9659604 | Dual-bit 3-T high density MTPROM array | Ramesh Raghavan, Balaji Jayaraman, Janakiraman Viraraghavan, Thejas Kempanna, Rajesh Reddy Tummuru | 2017-05-23 |
| 9589658 | Disturb free bitcell and array | Navin Agarwal, Aditya S. Auyisetty, Balaji Jayaraman, Thejas Kempanna, Ramesh Raghavan +4 more | 2017-03-07 |
| 9559040 | Double-sided segmented line architecture in 3D integration | Pooja R. Batra, John W. Golz, Mark D. Jacunski | 2017-01-31 |