Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9780788 | Muller C-element as majority gate for self-correcting triple modular redundant logic with low-overhead modes | Lawrence T. Clark, Vinay Vashishtha, Aditya Gujja | 2017-10-03 |
| 9734272 | Techniques for generating physical layouts of in silico multi mode integrated circuits | Lawrence T. Clark, Dan Patterson, Chandarasekaran Ramamurthy | 2017-08-15 |
| 9690927 | Providing an authenticating service of a chip | Subramanian S. Iyer, Toshiaki Kirihata, Sami Rosenblatt | 2017-06-27 |