VN

Vijay Narayanan

IBM: 13 patents #130 of 9,568Top 2%
YH Yahoo Holdings: 2 patents #86 of 639Top 15%
FI Fair Issac: 1 patents #1 of 3Top 35%
📍 San Jose, CA: #11 of 4,297 inventorsTop 1%
🗺 California: #167 of 41,698 inventorsTop 1%
Overall (2011): #1,040 of 364,097Top 1%
16
Patents 2011

Issued Patents 2011

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDate
8065619 Customized today module Deepak Agarwal, Bee-Chung Chen, Pradheep Elango, Nitin Motgi, Raghu Ramakrishnan +9 more 2011-11-22
8035173 CMOS transistors with differential oxygen content high-K dielectrics Huiming Bu, Eduard A. Cartier, Bruce B. Doris, Young-Hee Kim, Barry P. Linder +2 more 2011-10-11
8030716 Self-aligned CMOS structure with dual workfunction Dae-Gyu Park, Michael P. Chudzik, Vamsi K. Paruchuri 2011-10-04
7999323 Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices Eduard A. Cartier, Matthew W. Copel, Bruce B. Doris, Rajarao Jammy, Young-Hee Kim +3 more 2011-08-16
7989902 Scavenging metal stack for a high-k gate dielectric Takashi Ando, Changhwan Choi, Martin M. Frank 2011-08-02
7947549 Gate effective-workfunction modification for CMOS Dae-Gyu Park, Michael P. Chudzik, Rashmi Jha, Siddarth A. Krishnan, Naim Moumen +1 more 2011-05-24
7943460 High-K metal gate CMOS Renee T. Mo, Huiming Bu, Michael P. Chudzik, William K. Henson, Mukesh V. Khare 2011-05-17
7928514 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics Nestor A. Bojarczuk, Cyril Cabral, Jr., Eduard A. Cartier, Matthew W. Copel, Martin M. Frank +4 more 2011-04-19
7923743 Semiconductor structure including mixed rare earth oxide formed on silicon Nestor A. Bojarczuk, Douglas A. Buchanan, Supratik Guha, Lars-Ake Ragnarsson 2011-04-12
7919379 Dielectric spacer removal Eduard A. Cartier, Rashmi Jha, Sivananda K. Kanakasabapathy, Xi Li, Renee T. Mo +6 more 2011-04-05
7895206 Search query categrization into verticals Jiangyi Pan 2011-02-22
7880243 Simple low power circuit structure with metal gate and high-k dielectric Bruce B. Doris, Eduard A. Cartier, Barry P. Linder, Vamsi K. Paruchuri 2011-02-01
7872317 Dual metal gate self-aligned integration Alessandro C. Callegari, Michael P. Chudzik, Bruce B. Doris, Vamsi K. Paruchuri, Michelle L. Steen 2011-01-18
7870151 Fast accurate fuzzy matching Uwe Mayer, Matthias Blume 2011-01-11
7863126 Fabrication of a CMOS structure with a high-k dielectric layer oxidizing an aluminum layer in PFET region Dae-Gyu Park, Michael P. Chudzik, Vamsi K. Paruchuri 2011-01-04
7863083 High temperature processing compatible metal gate electrode for pFETS and methods for fabrication Ricky S. Amos, Douglas A. Buchanan, Cyril Cabral, Jr., Alessandro C. Callegari, Supratik Guha +4 more 2011-01-04