Issued Patents 2011
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8053327 | Method of manufacture of an integrated circuit system with self-aligned isolation structures | Shailendra Mishra, Lee-Wee Teo, Zhao Lun, Chung Woh Lai, Shyue Seng Tan +2 more | 2011-11-08 |
| 7999325 | Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS | Young Way Teh, Chung Woh Lai, Wenhe Lin, Khee Yong Lim, Wee Leng Tan +3 more | 2011-08-16 |
| 7977185 | Method and apparatus for post silicide spacer removal | Brian J. Greene, Chung Woh Lai, Wenhe Lin, Siddhartha Panda, Kern Rim +1 more | 2011-07-12 |
| 7932178 | Integrated circuit having a plurality of MOSFET devices | Lee-Wee Teo, Jeffrey Chee, Shyue Seng Tan, Chung Woh Lai, Johnny Widodo +2 more | 2011-04-26 |
| 7893502 | Threshold voltage improvement employing fluorine implantation and adjustment oxide layer | Weipeng Li, Dae-Gyu Park, Melanie J. Sherony, Jin-Ping Han | 2011-02-22 |