Issued Patents 2005
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6955981 | Pad structure to prompt excellent bondability for low-k intermetal dielectric layers | Yun-San Huan | 2005-10-18 |
| 6933157 | Semiconductor wafer manufacturing methods employing cleaning delay period | Chia-Lin Chen, Shih-Chang Chen | 2005-08-23 |
| 6911386 | Integrated process for fuse opening and passivation process for CU/LOW-K IMD | Chao-Chen Chen | 2005-06-28 |
| 6876062 | Seal ring and die corner stress relief pattern design to protect against moisture and metallic impurities | Shih Chung Chen, Ming-Soah Liang, Chen-Hua Yu | 2005-04-05 |
| 6864109 | Method and system for determining a component concentration of an integrated circuit feature | Vincent S. Chang, Chi-Chun Chen, Chun-Lin Wu, Shih-Chang Chen | 2005-03-08 |
| 6858944 | Bonding pad metal layer geometry design | Tai-Chun Huang | 2005-02-22 |