BD

Brian S. Doyle

IN Intel: 16 patents #4 of 2,371Top 1%
📍 Portland, OR: #3 of 685 inventorsTop 1%
🗺 Oregon: #7 of 2,197 inventorsTop 1%
Overall (2005): #300 of 245,428Top 1%
16
Patents 2005

Issued Patents 2005

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDate
6974733 Double-gate transistor with enhanced carrier mobility Boyan Boyanov, Jack T. Kavalieros, Anand S. Murthy, Robert S. Chau 2005-12-13
6974738 Nonplanar device with stress incorporation layer and method of fabrication Scott A. Hareland, Robert S. Chau, Suman Datta 2005-12-13
6972467 Multi-gate carbon nano-tube transistors Yuegang Zhang, George I. Bourianoff 2005-12-06
6972228 Method of forming an element of a microelectronic circuit Anand S. Murthy, Robert S. Chau 2005-12-06
6972225 integrating n-type and P-type metal gate transistors Mark L. Doczy, Justin K. Brask, Steven J. Keating, Chris Barns, Michael L. McSwiney +2 more 2005-12-06
6970373 Method and apparatus for improving stability of a 6T CMOS SRAM cell Suman Datta, Robert S. Chau, Jack T. Kavalieros, Bo Zheng, Scott A. Hareland 2005-11-29
6967140 Quantum wire gate device and method of making same 2005-11-22
6960517 N-gate transistor Rafael Rios, Thomas D. Linton, Jack T. Kavalieros 2005-11-01
6953719 Integrating n-type and p-type metal gate transistors Mark L. Doczy, Justin K. Brask, Steven J. Keating, Chris Barns, Michael L. McSwiney +2 more 2005-10-11
6952040 Transistor structure and method of fabrication Robert S. Chau, Jack T. Kavalieros, Anand S. Murthy, Brian Roberds 2005-10-04
6949476 Method of creating shielded structures to protect semiconductor devices David B. Fraser 2005-09-27
6914295 Tri-gate devices and methods of fabrication Robert S. Chau, Jack T. Kavalieros, Douglas Barlage, Suman Datta, Scott A. Hareland 2005-07-05
6909151 Nonplanar device with stress incorporation layer and method of fabrication Scott A. Hareland, Robert S. Chau, Suman Datta, Been-Yih Jin 2005-06-21
6887395 Method of forming sub-micron-size structures over a substrate Scott A. Hareland, Robert S. Chau 2005-05-03
6858483 Integrating n-type and p-type metal gate transistors Mark L. Doczy, Justin K. Brask, Steven J. Keating, Chris Barns, Michael L. McSwiney +2 more 2005-02-22
6858478 Tri-gate devices and methods of fabrication Robert S. Chau, Jack T. Kavalieros, Douglas Barlage, Suman Datta, Scott A. Hareland 2005-02-22