BR

Brian Roberds

IN Intel: 2 patents #368 of 2,371Top 20%
SG Silicon Genesis: 1 patents #3 of 6Top 50%
📍 West Sacramento, CA: #1 of 4 inventorsTop 25%
🗺 California: #1,948 of 26,868 inventorsTop 8%
Overall (2005): #26,193 of 245,428Top 15%
3
Patents 2005

Issued Patents 2005

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
6952040 Transistor structure and method of fabrication Robert S. Chau, Jack T. Kavalieros, Anand S. Murthy, Brian S. Doyle 2005-10-04
6908832 In situ plasma wafer bonding method Sharon N. Farrens 2005-06-21
6873013 Silicon-on-insulator structure and method of reducing backside drain-induced barrier lowering Doulgas Barlage 2005-03-29