Issued Patents 2005
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6974738 | Nonplanar device with stress incorporation layer and method of fabrication | Scott A. Hareland, Robert S. Chau, Brian S. Doyle | 2005-12-13 |
| 6970373 | Method and apparatus for improving stability of a 6T CMOS SRAM cell | Brian S. Doyle, Robert S. Chau, Jack T. Kavalieros, Bo Zheng, Scott A. Hareland | 2005-11-29 |
| 6914295 | Tri-gate devices and methods of fabrication | Robert S. Chau, Brian S. Doyle, Jack T. Kavalieros, Douglas Barlage, Scott A. Hareland | 2005-07-05 |
| 6909151 | Nonplanar device with stress incorporation layer and method of fabrication | Scott A. Hareland, Robert S. Chau, Brian S. Doyle, Been-Yih Jin | 2005-06-21 |
| 6887800 | Method for making a semiconductor device with a high-k gate dielectric and metal layers that meet at a P/N junction | Matthew V. Metz, Jack T. Kavalieros, Mark L. Doczy, Justin K. Brask, Uday Shah +1 more | 2005-05-03 |
| 6869889 | Etching metal carbide films | Justin K. Brask, Jack T. Kavalieros, Mark L. Doczy, Matthew V. Metz, Uday Shah +2 more | 2005-03-22 |
| 6858478 | Tri-gate devices and methods of fabrication | Robert S. Chau, Brian S. Doyle, Jack T. Kavalieros, Douglas Barlage, Scott A. Hareland | 2005-02-22 |