Issued Patents 2005
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6963132 | Integrated semiconductor device having co-planar device surfaces | Mark C. Hakey, David V. Horak, Harold G. Linde, Edmund J. Sprogis | 2005-11-08 |
| 6940134 | Semiconductor with contact contacting diffusion adjacent gate electrode | Toshiharu Furukawa, Mark C. Hakey, David V. Horak | 2005-09-06 |
| 6936879 | Increased capacitance trench capacitor | Toshiharu Furukawa, Mark C. Hakey, William H. Ma | 2005-08-30 |
| 6924200 | Methods using disposable and permanent films for diffusion and implantation doping | Toshiharu Furukawa, Mark C. Hakey, David V. Horak, William H. Ma, Patricia Marmillion +1 more | 2005-08-02 |
| 6919277 | Deliberate semiconductor film variation to compensate for radial processing differences, determine optimal device characteristics, or produce small productions | Toshiharu Furukawa, Mark C. Hakey, David V. Horak | 2005-07-19 |
| 6897777 | Non-linear junction detector | Andrew Stephen | 2005-05-24 |
| 6894475 | Scanning RF receiver | Andrew Stephen, Keith Raymond Fuller | 2005-05-17 |
| 6891235 | FET with T-shaped gate | Toshiharu Furukawa, Mark C. Hakey, David V. Horak, Edward J. Nowak | 2005-05-10 |
| 6891226 | Dual gate logic device | Toshiharu Furukawa, Mark C. Hakey, David V. Horak, William H. Ma | 2005-05-10 |
| 6875703 | Method for forming quadruple density sidewall image transfer (SIT) structures | Toshiharu Furukawa, Mark C. Hakey, David V. Horak, Charles W. Koburger, III, Peter H. Mitchell | 2005-04-05 |
| 6867143 | Method for etching a semiconductor substrate using germanium hard mask | Toshiharu Furukawa, Mark C. Hakey, David V. Horak, William H. Ma | 2005-03-15 |
| 6846727 | Patterned SOI by oxygen implantation and annealing | Keith E. Fogel, Mark C. Hakey, Devendra K. Sadana, Ghavam G. Shahidi | 2005-01-25 |