Issued Patents 2005
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6946373 | Relaxed, low-defect SGOI for strained Si CMOS applications | Paul D. Agnello, Stephen W. Bedell, Robert H. Dennard, Anthony G. Domenicucci, Devendra K. Sadana | 2005-09-20 |
| 6891360 | Plated probe structure | Brian S. Beaman, Paul A. Lauro, Eugene J. O'Sullivan, Da-Yuan Shih, Ho-Ming Tong | 2005-05-10 |
| 6880245 | Method for fabricating a structure for making contact with an IC device | Brian S. Beaman, Paul A. Lauro, Maurice Heathcote Norcott, Da-Yuan Shih | 2005-04-19 |
| 6878611 | Patterned strained silicon for high performance circuits | Devendra K. Sadana, Stephen W. Bedell, Tze-Chiang Chen, Kwang Su Choe | 2005-04-12 |
| 6861158 | Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal | Stephen W. Bedell, Joel P. de Souza, Devendra K. Sadana, Ghavam G. Shahidi | 2005-03-01 |
| 6855436 | Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal | Stephen W. Bedell, Devendra K. Sadana, Ghavam G. Shahidi | 2005-02-15 |
| 6846727 | Patterned SOI by oxygen implantation and annealing | Mark C. Hakey, Steven J. Holmes, Devendra K. Sadana, Ghavam G. Shahidi | 2005-01-25 |
| 6841457 | Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion | Stephen W. Bedell, Devendra K. Sadana | 2005-01-11 |