DH

David V. Horak

IBM: 11 patents #49 of 5,539Top 1%
📍 South Burlington, VT: #6 of 169 inventorsTop 4%
🗺 Vermont: #11 of 578 inventorsTop 2%
Overall (2003): #1,394 of 273,478Top 1%
11
Patents 2003

Issued Patents 2003

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDate
6656807 Grooved planar DRAM transfer device using buried pocket Gary B. Bronner, Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, Jack A. Mandelman 2003-12-02
6653737 Interconnection structure and method for fabricating same William A. Klaasen, Thomas L. McDevitt, Mark P. Murray, Anthony K. Stamper 2003-11-25
6627477 Method of assembling a plurality of semiconductor devices having different thickness Mark C. Hakey, Steven J. Holmes, Harold G. Linde, Edmund J. Sprogis 2003-09-30
6614074 Grooved planar DRAM transfer device using buried pocket Gary B. Bronner, Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, Jack A. Mandelman 2003-09-02
6605534 Selective deposition of a conductive material Dean S. Chung, Erick G. Walton 2003-08-12
6596597 Method of manufacturing dual gate logic devices Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, William H. Ma 2003-07-22
6583462 Vertical DRAM having metallic node conductor Toshiharu Furukawa, Rajarao Jammy, Thomas S. Kanarsky, Jeffrey J. Welser, Steven J. Holmes +1 more 2003-06-24
6531724 Borderless gate structures Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, Paul A. Rabidoux 2003-03-11
6506660 Semiconductor with nanoscale features Steven J. Holmes, Charles T. Black, David J. Frank, Toshiharu Furukawa, Mark C. Hakey +3 more 2003-01-14
6506653 Method using disposable and permanent films for diffusion and implant doping Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, William H. Ma, Patricia Marmillion +1 more 2003-01-14
6503827 Method of reducing planarization defects Susan G. Bombardier, Paul M. Feeney, Robert M. Geffken, Matthew J. Rutten 2003-01-07