Issued Patents 2003
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6620675 | Increased capacitance trench capacitor | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes | 2003-09-16 |
| 6596597 | Method of manufacturing dual gate logic devices | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak | 2003-07-22 |
| 6590258 | SIO stacked DRAM logic | Ramachandra Divakauni, Mark C. Hakey, Jack A. Mandclman, William R. Tonti | 2003-07-08 |
| 6548345 | Method of fabricating trench for SOI merged logic DRAM | Mark C. Hakey | 2003-04-15 |
| 6544837 | SOI stacked DRAM logic | Ramachandra Divakauni, Mark C. Hakey, Jack A. Mandelman, William R. Tonti | 2003-04-08 |
| 6544832 | Method of fabricating a stack capacitor DRAM | David E. Kotecki | 2003-04-08 |
| 6512266 | Method of fabricating SiO2 spacers and annealing caps | Sadanand V. Deshpande, Bruce B. Doris, Rajarao Jammy | 2003-01-28 |
| 6506653 | Method using disposable and permanent films for diffusion and implant doping | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Patricia Marmillion +1 more | 2003-01-14 |
| 6506660 | Semiconductor with nanoscale features | Steven J. Holmes, Charles T. Black, David J. Frank, Toshiharu Furukawa, Mark C. Hakey +3 more | 2003-01-14 |