Issued Patents 2002
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6476460 | Stacked gate MOS structure for multiple voltage power supply applications | Jin-Yuan Lee, Choe-San Yoo | 2002-11-05 |
| 6455330 | Methods to create high-k dielectric gate electrodes with backside cleaning | Liang-Gi Yao, Ming-Fang Wang, Shih-Chang Chen | 2002-09-24 |
| 6440833 | Method of protecting a copper pad structure during a fuse opening procedure | Tze-Liang Lee | 2002-08-27 |
| 6436771 | Method of forming a semiconductor device with multiple thickness gate dielectric layers | Syun-Ming Jang, Chen-Hua Yu | 2002-08-20 |
| 6423625 | Method of improving the bondability between Au wires and Cu bonding pads | Syun-Ming Jang, Chen-Hua Yu, Chung-Shi Liu, Jane-Bai Lai | 2002-07-23 |
| 6387775 | Fabrication of MIM capacitor in copper damascene process | Syun-Ming Jang | 2002-05-14 |
| 6368952 | Diffusion inhibited dielectric structure for diffusion enhanced conductor layer | Syun-Ming Jang | 2002-04-09 |
| 6355962 | CMOS FET with P-well with P- type halo under drain and counterdoped N- halo under source region | Shyh-Chyi Wong | 2002-03-12 |
| 6346729 | Pseudo silicon on insulator MOSFET device | Jin-Yuan Lee, Chue-San Yoo | 2002-02-12 |
| 6339029 | Method to form copper interconnects | Chen-Hua Yu | 2002-01-15 |