Issued Patents 2002
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6500711 | Fabrication method for an interpoly dielectric layer | — | 2002-12-31 |
| 6498104 | Method of in-situ cleaning for LPCVD TEOS pump | Fuodoor Gologhlan, David Chi, Hector Serrato | 2002-12-24 |
| 6487114 | Method of reading two-bit memories of NROM cell | Fuh-Cheng Jong | 2002-11-26 |
| 6486028 | Method of fabricating a nitride read-only-memory cell vertical structure | Yao-Wen Chang | 2002-11-26 |
| 6461949 | Method for fabricating a nitride read-only-memory (NROM) | Chia-Hsing Chen | 2002-10-08 |
| 6458212 | Mesh filter design for LPCVD TEOS exhaust system | Fuodoor Gologhlan, David Chi, Hector Serrato, Jayendra D. Bhakta | 2002-10-01 |
| 6455890 | Structure of fabricating high gate performance for NROM technology | Jen-yuan Chiu | 2002-09-24 |
| 6448136 | Method of manufacturing flash memory | Cheng-Chen Calvin Hsueh | 2002-09-10 |
| 6420237 | Method of manufacturing twin bit cell flash memory device | — | 2002-07-16 |
| 6413840 | Method of gettering layer for improving chemical-mechanical polishing process in flash memory production and semiconductor structure thereof | Uway Tseng, Wen-Pin Lu | 2002-07-02 |
| 6410949 | Flash memory device with monitor structure for monitoring second gate over-etch | John Jianshi Wang, Hao Fang | 2002-06-25 |
| 6380033 | Process to improve read disturb for NAND flash memory devices | Yue-Song He, Allen Huang | 2002-04-30 |
| 6380029 | Method of forming ono stacked films and DCS tungsten silicide gate to improve polycide gate performance for flash memory devices | Kenneth Wo-Wai Au, John Jianshi Wang | 2002-04-30 |
| 6376309 | Method for reduced gate aspect ratio to improve gap-fill after spacer etch | John Jianshi Wang, Hao Fang, Lu You | 2002-04-23 |
| 6362049 | High yield performance semiconductor process flow for NAND flash memory products | Salvatore F. Cagnina, Hao Fang, John Jianshi Wang, Masaatzi Higashitani | 2002-03-26 |
| 6355522 | Effect of doped amorphous Si thickness on better poly 1 contact resistance performance for nand type flash memory devices | John Jianshi Wang, Yuesong He | 2002-03-12 |
| 6348381 | Method for forming a nonvolatile memory with optimum bias condition | Fuh-Cheng Jong | 2002-02-19 |