Issued Patents 2002
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6489242 | Process for planarization of integrated circuit structure which inhibits cracking of low dielectric constant dielectric material adjacent underlying raised structures | Ronald J. Nagahara, Dawn M. Lee | 2002-12-03 |
| 6439981 | Arrangement and method for polishing a surface of a semiconductor wafer | Ron Nagahara | 2002-08-27 |
| 6424019 | Shallow trench isolation chemical-mechanical polishing process | Shouli Steve Hsia, Yanhua Wang | 2002-07-23 |
| 6417093 | Process for planarization of metal-filled trenches of integrated circuit structures by forming a layer of planarizable material over the metal layer prior to planarizing | James J. Xie, Ronald J. Nagahara, Akihisa Ueno | 2002-07-09 |
| 6391768 | Process for CMP removal of excess trench or via filler metal which inhibits formation of concave regions on oxide surface of integrated circuit structure | Dawn M. Lee, Weidan Li, Ming-Yi Lee | 2002-05-21 |
| 6372524 | Method for CMP endpoint detection | James J. Xie, Ronald J. Nagahara | 2002-04-16 |