AU

Akihisa Ueno

Lsi Logic: 2 patents #56 of 388Top 15%
📍 Cupertino, CA: #135 of 620 inventorsTop 25%
🗺 California: #3,859 of 26,763 inventorsTop 15%
Overall (2002): #74,632 of 266,432Top 30%
2
Patents 2002

Issued Patents 2002

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6417093 Process for planarization of metal-filled trenches of integrated circuit structures by forming a layer of planarizable material over the metal layer prior to planarizing James J. Xie, Ronald J. Nagahara, Jayanthi Pallinti 2002-07-09
6340434 Method and apparatus for chemical-mechanical polishing Hiroshi Mizuno, Osamu Kinoshita, Tetsuaki Murohashi, Yoshifumi Sakuma, Kostas Amberiadis 2002-01-22