Issued Patents 2002
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6432754 | Double SOI device with recess etch and epitaxy | Fariborz Assaderaghi, Tze-Chiang Chen, K. Paul Muller, Edward J. Nowak, Devendra K. Sadana | 2002-08-13 |
| 6429488 | Densely patterned silicon-on-insulator (SOI) region on a wafer | Effendi Leobandung, Devendra K. Sadana, Dominic J. Schepis | 2002-08-06 |
| 6426252 | Silicon-on-insulator vertical array DRAM cell with self-aligned buried strap | Carl Radens, Gary B. Bronner, Tze-Chiang Chen, Bijan Davari, Jack A. Mandelman +3 more | 2002-07-30 |
| 6404014 | Planar and densely patterned silicon-on-insulator structure | Effendi Leobandung, Devendra K. Sadana, Dominic J. Schepis | 2002-06-11 |
| 6337253 | Process of making buried capacitor for silicon-on-insulator structure | Bijan Davari, Effendi Leobandung, Werner Rausch | 2002-01-08 |