Issued Patents All Time
Showing 101–125 of 140 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7328328 | Non-temporal memory reference control mechanism | G. Glenn Henry, Terry Parks | 2008-02-05 |
| 7315921 | Apparatus and method for selective memory attribute control | G. Glenn Henry, Terry Parks | 2008-01-01 |
| 7313658 | Microprocessor and method for utilizing disparity between bus clock and core clock frequencies to prioritize cache line fill bus access requests | G. Glenn Henry | 2007-12-25 |
| 7302551 | Suppression of store checking | G. Glenn Henry, Terry Parks | 2007-11-27 |
| 7263585 | Store-induced instruction coherency mechanism | — | 2007-08-28 |
| 7240163 | Microprocessor, apparatus and method for selective prefetch retire | Glenn Henry | 2007-07-03 |
| 7234025 | Microprocessor with repeat prefetch instruction | — | 2007-06-19 |
| 7191320 | Apparatus and method for performing a detached load operation in a pipeline microprocessor | Daniel W. J. Johnson, Albert J. Loper | 2007-03-13 |
| 7191291 | Microprocessor with variable latency stack cache | — | 2007-03-13 |
| 7188215 | Apparatus and method for renaming a cache line | — | 2007-03-06 |
| 7185180 | Apparatus and method for selective control of condition code write back | G. Glenn Henry, Terry Parks | 2007-02-27 |
| 7181596 | Apparatus and method for extending a microprocessor instruction set | G. Glenn Henry, Terry Parks | 2007-02-20 |
| 7155598 | Apparatus and method for conditional instruction execution | G. Glenn Henry, Terry Parks | 2006-12-26 |
| 7139877 | Microprocessor and apparatus for performing speculative load operation from a stack memory cache | — | 2006-11-21 |
| 7139876 | Microprocessor and apparatus for performing fast speculative pop operation from a stack memory cache | — | 2006-11-21 |
| 7136990 | Fast POP operation from RAM cache using cache row value stack | — | 2006-11-14 |
| 7133968 | Method and apparatus for resolving additional load misses in a single pipeline processor under stalls of instructions not accessing memory-mapped I/O regions | Daruis D. Gaskins, G. Glenn Henry | 2006-11-07 |
| 7111125 | Apparatus and method for renaming a data block within a cache | — | 2006-09-19 |
| 7089371 | Microprocessor apparatus and method for prefetch, allocation, and initialization of a block of cache lines from memory | — | 2006-08-08 |
| 7089368 | Microprocessor apparatus and method for exclusively prefetching a block of cache lines from memory | — | 2006-08-08 |
| 7080211 | Microprocessor apparatus and method for prefetch, allocation, and initialization of a cache line from memory | — | 2006-07-18 |
| 7080210 | Microprocessor apparatus and method for exclusive prefetch of a cache line from memory | — | 2006-07-18 |
| 7065632 | Method and apparatus for speculatively forwarding storehit data in a hierarchical manner | Gerard M. Col, G. Glenn Henry | 2006-06-20 |
| 7000081 | Write back and invalidate mechanism for multiple cache lines | — | 2006-02-14 |
| 6990558 | Microprocessor, apparatus and method for selective prefetch retire | Glenn Henry | 2006-01-24 |