RH

Rodney E. Hooker

VT Via Technologies: 62 patents #6 of 1,108Top 1%
IP Ip-First: 44 patents #3 of 27Top 15%
VC Via Alliance Semiconductor Co.: 28 patents #5 of 157Top 4%
IL I.P.-First, L.L.C.: 2 patents #7 of 11Top 65%
Meta: 2 patents #2,891 of 6,845Top 45%
CT Centaur Technologies: 1 patents #6 of 7Top 90%
🗺 Texas: #220 of 125,132 inventorsTop 1%
Overall (All Time): #7,178 of 4,157,543Top 1%
140
Patents All Time

Issued Patents All Time

Showing 126–140 of 140 patents

Patent #TitleCo-InventorsDate
6988172 Microprocessor, apparatus and method for selectively associating store buffer cache line status with response buffer cache line status Glenn Henry 2006-01-17
6985999 Microprocessor and method for utilizing disparity between bus clock and core clock frequencies to prioritize cache line fill bus access requests G. Glenn Henry 2006-01-10
6862670 Tagged address stack and microprocessor using same G. Glenn Henry 2005-03-01
6832296 Microprocessor with repeat prefetch instruction 2004-12-14
6810466 Microprocessor and method for performing selective prefetch based on bus activity level G. Glenn Henry 2004-10-26
6681311 Translation lookaside buffer that caches memory type information Darius D. Gaskins, G. Glenn Henry 2004-01-20
6675287 Method and apparatus for store forwarding using a response buffer data path in a write-allocate-configurable microprocessor Darius D. Gaskins, G. Glenn Henry 2004-01-06
6647489 Compare branch instruction pairing within a single integer pipeline Gerard M. Col, G. Glenn Henry 2003-11-11
6622211 Virtual set cache that redirects store data to correct virtual set to avoid virtual set store miss penalty G. Glenn Henry 2003-09-16
6609191 Method and apparatus for speculative microinstruction pairing Dinesh K. Jain, Terry Parks 2003-08-19
6587929 Apparatus and method for performing write-combining in a pipelined microprocessor using tags G. Glenn Henry 2003-07-01
6581151 Apparatus and method for speculatively forwarding storehit data based on physical page index compare G. Glenn Henry 2003-06-17
6553473 Byte-wise tracking on write allocate Darius D. Gaskins 2003-04-22
6549985 Method and apparatus for resolving additional load misses and page table walks under orthogonal stalls in a single pipeline processor Darius D. Gaskins, G. Glenn Henry 2003-04-15
6338136 Pairing of load-ALU-store with conditional branch Gerard M. Col 2002-01-08