Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6894904 | Tab package | Kwun-Yao Ho | 2005-05-17 |
| 6881662 | Pattern formation process for an integrated circuit substrate | Kwun-Yao Ho | 2005-04-19 |
| 6876087 | Chip scale package with heat dissipating part | Kwun-Yao Ho | 2005-04-05 |
| 6865089 | Module board having embedded chips and components and method of forming the same | Kwun-Yao Ho | 2005-03-08 |
| 6849955 | High density integrated circuit packages and method for the same | Kwun-Yao Ho | 2005-02-01 |
| 6849534 | Process of forming bonding columns | Kwun-Yao Ho | 2005-02-01 |
| 6808643 | Hybrid interconnect substrate and method of manufacture thereof | Kwun-Yao Ho | 2004-10-26 |
| 6743659 | Method for manufacturing multi-layer package substrates | Kwun-Yao Ho | 2004-06-01 |
| 6716037 | Flexible electric-contact structure for IC package | Kwun-Yao Ho | 2004-04-06 |
| 6717264 | High density integrated circuit package | Kwun-Yao Ho | 2004-04-06 |
| 6716692 | Fabrication process and structure of laminated capacitor | Kwun-Yo Ho | 2004-04-06 |
| 6707162 | Chip package structure | Kwun-Yao Ho | 2004-03-16 |
| 6696305 | Metal post manufacturing method | Kwun-Yao Ho | 2004-02-24 |
| 6695040 | Thin planar heat distributor | Kwun-Yao Ho | 2004-02-24 |
| 6692265 | Electrical connection device | Kwun-Yao Ho | 2004-02-17 |
| 6667190 | Method for high layout density integrated circuit package substrate | Kwun-Yao Ho | 2003-12-23 |
| 6569712 | Structure of a ball-grid array package substrate and processes for producing thereof | Kwun-Yao Ho, Lin-Chou Tung, Jackie Fu | 2003-05-27 |