GC

Gerard M. Col

VC Via Alliance Semiconductor Co.: 29 patents #4 of 157Top 3%
VT Via Technologies: 20 patents #22 of 1,108Top 2%
IP Ip-First: 10 patents #6 of 27Top 25%
IL I.P.-First, L.L.C.: 9 patents #3 of 11Top 30%
IT Integrated Device Technology: 2 patents #282 of 758Top 40%
🗺 Texas: #872 of 125,132 inventorsTop 1%
Overall (All Time): #27,249 of 4,157,543Top 1%
73
Patents All Time

Issued Patents All Time

Showing 26–50 of 73 patents

Patent #TitleCo-InventorsDate
9804845 Apparatus and method to preclude X86 special bus cycle load replays in an out-of-order processor Colin Eddy, G. Glenn Henry 2017-10-31
9740271 Apparatus and method to preclude X86 special bus cycle load replays in an out-of-order processor Colin Eddy, G. Glenn Henry 2017-08-22
9703359 Power saving mechanism to reduce load replays in out-of-order processor Colin Eddy, G. Glenn Henry 2017-07-11
9645822 Conditional store instructions in an out-of-order execution microprocessor G. Glenn Henry, Terry Parks, Rodney E. Hooker, Colin Eddy 2017-05-09
9645827 Mechanism to preclude load replays dependent on page walks in an out-of-order processor Colin Eddy, G. Glenn Henry 2017-05-09
9588769 Processor that leapfrogs MOV instructions Matthew Daniel Day 2017-03-07
9501286 Microprocessor with ALU integrated into load unit Colin Eddy, Rodney E. Hooker 2016-11-22
9378019 Conditional load instructions in an out-of-order execution microprocessor G. Glenn Henry, Terry Parks, Rodney E. Hooker, Colin Eddy 2016-06-28
9244686 Microprocessor that translates conditional load/store instructions into variable number of microinstructions G. Glenn Henry, Terry Parks, Rodney E. Hooker, Colin Eddy 2016-01-26
9032189 Efficient conditional ALU instruction in read-port limited register file microprocessor G. Glenn Henry, Rodney E. Hooker, Terry Parks 2015-05-12
8924695 Conditional ALU instruction condition satisfaction propagation between microinstructions in read-port limited register file microprocessor G. Glenn Henry, Rodney E. Hooker, Terry Parks 2014-12-30
8909908 Microprocessor that refrains from executing a mispredicted branch in the presence of an older unretired cache-missing load instruction Rodney E. Hooker, Bryan Wayne Pogor 2014-12-09
8880857 Conditional ALU instruction pre-shift-generated carry flag propagation between microinstructions in read-port limited register file microprocessor G. Glenn Henry, Rodney E. Hooker, Terry Parks 2014-11-04
8880854 Out-of-order execution microprocessor that speculatively executes dependent memory access instructions by predicting no value change by older instructions that load a segment register Rodney E. Hooker, Terry Parks 2014-11-04
8495343 Apparatus and method for detection and correction of denormal speculative floating point operand G. Glenn Henry, Timothy A. Elliott, Rodney E. Hooker, Terry Parks 2013-07-23
8332618 Out-of-order X86 microprocessor with fast shift-by-zero handling Matthew Daniel Day, Terry Parks, Bryan Wayne Pogor 2012-12-11
8090931 Microprocessor with fused store address/store data microinstruction G. Glenn Henry, Rodney E. Hooker, Terry Parks 2012-01-03
8074060 Out-of-order execution microprocessor that selectively initiates instruction retirement early Brent Bean, Bryan Wayne Pogor 2011-12-06
8069339 Microprocessor with microinstruction-specifiable non-architectural condition code flag register G. Glenn Henry, Terry Parks 2011-11-29
8069340 Microprocessor with microarchitecture for efficiently executing read/modify/write memory operand instructions Rodney E. Hooker, Colin Eddy 2011-11-29
7937561 Merge microinstruction for minimizing source dependencies in out-of-order execution microprocessor with variable data size macroarchitecture Terry Parks 2011-05-03
7185182 Pipelined microprocessor, apparatus, and method for generating early instruction results 2007-02-27
7117347 Processor including fallback branch prediction mechanism for far jump and far call instructions Thomas C. McDonald 2006-10-03
7107438 Pipelined microprocessor, apparatus, and method for performing early correction of conditional branch instruction mispredictions 2006-09-12
7100024 Pipelined microprocessor, apparatus, and method for generating early status flags 2006-08-29